1. Field
Embodiments of the present invention relate to a nonvolatile semiconductor memory device.
2. Description of the Related Art
In recent years, ReRAM (Resistive RAM) has been receiving attention as a technology for realizing an even higher level of integration in nonvolatile semiconductor memory devices.
A memory cell array in this ReRAM is configured by a plurality of word lines and a plurality of bit lines that intersect one another, and memory cells provided at each of intersections of these plurality of word lines and plurality of bit lines.
When it is desired to perform data write to these memory cells, for example, a potential of a selected word line and a selected bit line must be set such that a bias required for data write is applied to a selected memory cell, and a potential of unselected word lines and unselected bit lines must be set such that a bias applied to unselected memory cells is small enough to prevent data being written to said unselected memory cells.
However, adopting such a bias state in the memory cell array results in sneak currents flowing between the unselected word lines and the selected bit line or the selected word line and the unselected bit lines via the unselected memory cells. As a result, a voltage drop induced by these sneak currents causes power consumption during an access operation to increase.